prosody
27e1d4354274
spec/scansion/vcard_temp.scs

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spec/scansion/vcard_temp.scs @ 12769:27e1d4354274

util.jid: Simplify boolean logic in conditionals
author Matthew Wild <mwild1@gmail.com>
date Tue, 11 Oct 2022 13:35:09 +0100
parent 9524:1f6f3b941eb1
child 12967:53b0730093d8
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12768:6e3aa3995eab 12769:27e1d4354274